);
return highlow32(_hi,_lo);
}
-#elif defined(__sparc__) || defined(__sparc64__)
+#elif (defined(__sparc__) || defined(__sparc64__)) && !defined(NO_ASM)
extern "C" uint32 mulu16_ (uint16 arg1, uint16 arg2);
#define mulu16 mulu16_ // extern in Assembler
#else
var union { double f; uint32 i[2]; uint16 s[4]; } __fi; \
__fi.f = (double)(sint32)(_x)*(double)(sint32)(_y) \
+ (double)(4503599627370496.0L); /* + 2^52, zum Normalisieren */\
- hi_zuweisung __fi.s[1]; /* mittlere 16 Bit herausholen, (benutzt CL_CPU_BIG_ENDIAN_P !) */\
+ unused (hi_zuweisung __fi.s[1]); /* mittlere 16 Bit herausholen, (benutzt CL_CPU_BIG_ENDIAN_P !) */\
lo_zuweisung __fi.i[1]; /* untere 32 Bit herausholen (benutzt CL_CPU_BIG_ENDIAN_P !) */\
}
#else
extern "C" uint32 mulu32_high; // -> High-Teil
#if defined(__GNUC__) && defined(__m68k__) && !defined(NO_ASM)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
- ({ var uint32 _x = (x); \
- var uint32 _y = (y); \
- var uint32 _hi; \
- var uint32 _lo; \
+ ({ var uint32 _x = (x); \
+ var uint32 _y = (y); \
+ var uint32 _hi; \
+ var uint32 _lo; \
__asm__("mulul %3,%0:%1" : "=d" (_hi), "=d"(_lo) : "1" (_x), "dm" (_y) ); \
- hi_zuweisung _hi; \
- lo_zuweisung _lo; \
+ unused (hi_zuweisung _hi); \
+ lo_zuweisung _lo; \
})
#elif defined(__GNUC__) && defined(__m68k__)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
_hi += high16(_mid); _mid = highlow32_0(low16(_mid)); \
_lo += _mid; if (_lo < _mid) { _hi += 1; } /* 64-Bit-Addition */\
} \
- hi_zuweisung _hi; \
+ unused (hi_zuweisung _hi); \
lo_zuweisung _lo; \
})
#elif defined(__GNUC__) && defined(__sparc64__) && !defined(NO_ASM)
: "=r" (_prod) \
: "r" ((uint32)(x)), "r" ((uint32)(y)) \
); \
- hi_zuweisung (uint32)(_prod>>32); \
+ unused (hi_zuweisung (uint32)(_prod>>32)); \
lo_zuweisung (uint32)(_prod); \
})
#elif defined(__GNUC__) && defined(__sparc__) && !defined(NO_ASM)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
({ lo_zuweisung mulu32_(x,y); /* extern in Assembler */ \
{var register uint32 _hi __asm__("%g1"); \
- hi_zuweisung _hi; \
+ unused (hi_zuweisung _hi); \
}})
#elif defined(__GNUC__) && defined(__arm__) && 0 // see comment cl_asm_arm.cc
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
({ lo_zuweisung mulu32_(x,y); /* extern in Assembler */ \
{var register uint32 _hi __asm__("%r1"/*"%a2"*/); \
- hi_zuweisung _hi; \
+ unused (hi_zuweisung _hi); \
}})
#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__)) && !defined(NO_ASM)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
: "=d" /* %edx */ (_hi), "=a" /* %eax */ (_lo) \
: "g" ((uint32)(x)), "1" /* %eax */ ((uint32)(y)) \
); \
- hi_zuweisung _hi; lo_zuweisung _lo; \
+ unused (hi_zuweisung _hi); lo_zuweisung _lo; \
})
#elif defined(__GNUC__) && defined(__mips__) && !defined(NO_ASM)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
: "=r" (_hi), "=r" (_lo) \
: "r" ((uint32)(x)), "r" ((uint32)(y)) \
); \
- hi_zuweisung _hi; lo_zuweisung _lo; \
+ unused (hi_zuweisung _hi); lo_zuweisung _lo; \
})
#elif defined(__GNUC__) && defined(HAVE_LONGLONG) && !defined(__arm__)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
({ var register uint64 _prod = (uint64)(uint32)(x) * (uint64)(uint32)(y); \
- hi_zuweisung (uint32)(_prod>>32); \
+ unused (hi_zuweisung (uint32)(_prod>>32)); \
lo_zuweisung (uint32)(_prod); \
})
#elif defined(WATCOM) && defined(__i386__) && !defined(NO_ASM)
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
- { var register uint32 _hi; \
- var register uint32 _lo; \
- _lo = mulu32_(x,y), _hi = mulu32_high_(); \
- hi_zuweisung _hi; lo_zuweisung _lo; \
+ { var register uint32 _hi; \
+ var register uint32 _lo; \
+ _lo = mulu32_(x,y), _hi = mulu32_high_(); \
+ unused (hi_zuweisung _hi); lo_zuweisung _lo; \
}
extern "C" uint32 mulu32_high_ (void);
#pragma aux mulu32_ = 0xF7 0xE2 /* mull %edx */ parm [eax] [edx] value [eax] modify [eax edx];
#pragma aux mulu32_high_ = /* */ value [edx] modify [];
#else
#define mulu32(x,y,hi_zuweisung,lo_zuweisung) \
- { lo_zuweisung mulu32_(x,y); hi_zuweisung mulu32_high; }
+ { lo_zuweisung mulu32_(x,y); unused (hi_zuweisung mulu32_high); }
#if (defined(__m68k__) || defined(__sparc__) || defined(__sparc64__) || defined(__arm__) || (defined(__i386__) && !defined(WATCOM) && !defined(MICROSOFT)) || defined(__x86_64__) || defined(__mips__) || defined(__hppa__)) && !defined(NO_ASM)
// mulu32_ extern in Assembler
#if defined(__sparc__) || defined(__sparc64__)
#else
#define mulu64(x,y,hi_zuweisung,lo_zuweisung) \
{ lo_zuweisung mulu64_(x,y); hi_zuweisung mulu64_high; }
- #if defined(__sparc64__)
+ #if defined(__sparc64__) && !defined(NO_ASM)
// mulu64_ extern in Assembler
- #if defined(__sparc64__)
- extern "C" uint64 _get_g2 (void);
- #define mulu64_high (_get_g2()) // Rückgabe im Register %g2
- #else
- #define NEED_VAR_mulu64_high
- #endif
+ extern "C" uint64 _get_g2 (void);
+ #define mulu64_high (_get_g2()) // Rückgabe im Register %g2
#else
#define NEED_FUNCTION_mulu64_
#endif
__asm__ __volatile__ ( \
"wr %%g0,%%g0,%%y\n\t" \
"udiv %2,%3,%0\n\t" \
- "umul %0,%3,%1" \
+ "umul %0,%3,%1\n\t" \
"sub %2,%1,%1" \
: "=&r" (__q), "=&r" (__r) \
: "r" (__x), "r" (__y)); \
__asm__ __volatile__ ( \
"wr %%g0,%%g0,%%y\n\t" \
"udiv %2,%3,%0\n\t" \
- "umul %0,%3,%1" \
+ "umul %0,%3,%1\n\t" \
"sub %2,%1,%1" \
: "=&r" (__q), "=&r" (__r) \
: "r" (__x), "r" (__y)); \
__asm__ __volatile__ ( \
"wr %%g0,%%g0,%%y\n\t" \
"udiv %2,%3,%0\n\t" \
- "umul %0,%3,%1" \
+ "umul %0,%3,%1\n\t" \
"sub %2,%1,%1" \
: "=&r" (__q), "=&r" (__r) \
: "r" (__x), "r" (__y)); \
q_zuweisung (uint32)__q; \
r_zuweisung (uint32)__r; \
})
+ #define divu_3232_3232_(x,y) divu_6432_3232_(0,x,y)
#elif defined(__sparc__) || defined(__sparc64__) || defined(__i386__) || defined(__x86_64__)
#define divu_3232_3232(x,y,q_zuweisung,r_zuweisung) \
divu_6432_3232(0,x,y,q_zuweisung,r_zuweisung)
__asm__ __volatile__ ( \
"wr %2,%%g0,%%y\n\t" \
"udiv %3,%4,%0\n\t" \
- "umul %0,%4,%1" \
+ "umul %0,%4,%1\n\t" \
"sub %3,%1,%1" \
: "=&r" (__q), "=&r" (__r) \
: "r" (__xhi), "r" (__xlo), "r" (__y)); \
__asm__ __volatile__ ( \
"wr %2,%%g0,%%y\n\t" \
"udiv %3,%4,%0\n\t" \
- "umul %0,%4,%1" \
+ "umul %0,%4,%1\n\t" \
"sub %3,%1,%1" \
: "=&r" (__q), "=&r" (__r) \
: "r" (__xhi), "r" (__xlo), "r" (__y)); \